Hi,
I have the following problem. When periodic SMI events are enabled the APIC error interrupt gets triggered for each CPU. I run the tests on a board with E3845 and use the default interval of 64 seconds.
Each 64 seconds Linux ERR count are increased with 4. If I disable periodic events, the ERR counter will stay at 0. The SMI is generated by chipset and thus it triggers all CPUs.
Any idea of how to avoid this behavior except disabling SMIs? I expect that chipset SMIs should not end up as APIC error interrupts, like spurious interrupts will do. Other than the 4 APIC error interrupts each minute, I have no abnormal interrupt activity.
Any ideas?
Best regards,
B-O