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Gordon Peak MBR bsp packages

Hi,  I'm looking for Gordon Ridge/Peak BSP packages to build the image using Yocto. Where do I find them?

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Ethernet phy i210 transformerless

Hi Intel community,we are implementing the i210 in an embedded design and are wondering if it is possible to build a transformerless ethernet connection with it.  We would like to connect two i210 via...

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Intel Atom® E3900 available on sale

I can not find this processor on sale.But I see on sale a lot of modules with this processor.To start my project, I need to buy it.Who will tell the distributor, or is there another ability? I would be...

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Where is Doc number: 564725 available for download?

This document has the password that is required to run 'IntelThermal Analysis Tool Windows, Linux and Chrome v5.0.1026 - (#539446)' and is the single result when searching for document # 564725. Can...

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Intel IEI Tank 870 not booting up

When  IEI TANK 870 with i5 processor, was initially powered up and switched on, it is not getting booted up.  Could you please help.We presume that IEI Tank is pre installed with Ubuntu OS. While...

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Multicore problem

I have 4 core processor i5-3570. I run the multicore in a bare PC environment, no OS or kernel. Four cores are running properly. However, APs run 220 times slower than BSP. I checked the running...

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Which processor, should I buy for super computer?

Hello,  This is Akita, please help. Regards.

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UART is through PCIe ?

Hello, We use Intel atom apollo lake (in conga-ma5).In block diagram it appears as if the serial is connected directly to uart, but on doing "lcpci" , it alsa appears , so from this I guess that it is...

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how to measure the bandwidth between the dual socket system connected by vpi...

Hi,     how to measure the bandwidth between the dual socket system connected by vpi bus? such as the bandwidth of accessing memory and accessing device.     It's importent to deploy my applications....

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how to set userspace pages in uncacheable mode?

Hi All,     In some case, i want to use userspace pages in uncacheable mode? I know it can use set_memory_uc() function in the kernel space, but how to make it in userspace?     If you have any...

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How to make custom firmware and update by Intel Firmware Engine?(Minnowboard)

Hi,I try to make a custom firmware by Intel Firmware Engine.First, I built .efi and .cap files by following this Intel video(How to Use the Capsule Update Method on the MinnowBoard MAX* ).copy files to...

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Where to find document #552974

I already found that the document must be named "Application Programming Interface Specification for Intel® Integrated Graphics Chipsets" but I cannnot find a download anywhere.I tried the search of...

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eeupdate ARM Tool

Hi Intel Team, Could you please provide us eeupdate ARM tool and the Usage guide.Please send to vic_lin@asus.com Thanks in advanceBest Regards

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How to bring up new Apollo Lake platform?

Hi , I am trying to bring up a new Apollo Lake-based platform with a coreboot+SeaBIOS combination - it is very similar to the Leaf Hill CRB so I adapted my platform code using the Leaf Hill project as...

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Coreboot for Apollolake

Hi, We would like to build coreboot image for Apollo lake platform. We are using Coreboot-4.8.1Apollo lake Intel FSP_2_0 We have built the coreboot source and created coreboot.rom image with the below...

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How to create Apollo-lake IFWI.bin for coreboot coding use

Dear all,    I bring up Apollo lake +DDR-3L board, use Coreboot + Intel FSP, https://firmware.intel.com/projects/minnowboard3MinnowBoard3 0.62 Binary Object Modules (ZIP file; for use with EDK II...

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How to create a coreboot boot loader for a Juniper Hill CRB?

Hello, I have an Oxbow Hill CRB and a Juniper Hill CRB,and I created a coreboot boot loader (SPI Flash Image) with Intel's Reference Proof of Concept Coreboot for Apollo Lake (566288). The release...

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Where to download flash image tool (fitc) for Bay Trail?

Hello,I am working on a Bay Trail design and need to make changes to the SPI flash. However, when when I use the new SPI flash the system does not boot. I think I need to update the flash descriptor to...

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Terminal finish and Reflow Temperature details

Need the terminal plating finsh and peak reflow temparature and time for the part PSB21150F S LLHQ or PSB21150F-V1.4X

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i210 PCIe bus detection , flash read

I have an embedded i210 design (copper Ethernet connection). The i210 controller is connected to a Com Express i5-7300U module.  The basic design boots and can load the Ubuntu OS. Doing an lspci scan I...

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